Dr. SMT. LAKSHMI B

Associate Professor

Department of Electronics & communication Engineering

National Institute of Technology, Warangal - 506004, Telangana, INDIA

: lakshmi@nitw.ac.in

: 9493436845

Interests: Internet of Things, Machine Learning, VLSI Architectures, Digital System Design, Embedded System Design, Digital IC Design, FPGA Design, Low power VLSI design, ASIC Design

 

Educational Qualifications:

  •    B.Tech (E.C.E), ( M.Tech (E.I), Ph.D  (VLSI Architectures)(I.I.T, Kharagpur)


 

 


 


Course Taught Previously

 

Course Taught Previously:

Switching Theory and Logic Design, Electronic Engineering-I, Microprocessor Systems, Digital IC Applications, Linear IC Applications, Digital System Design, Computer Architecture and Organization, Structural Digital System Design,  PC Based Instrumentation, Microprocessors and Microcontrollers, Digital IC Design, FPGA Design, VLSI Architectures, VLSI System Design, Low Power VLSI, Industrial IoT

 

Courses Currently Being Taught:

  • ASIC Design, Low Power VLSI, Digital IC Design, VLSI Architectures,  Embedded System Design,  DSD Lab, DICD Lab

Publications

Journal Publication Details

       


  • Sudarsana Reddy Karnati, Lakshmi Bopanna, Dhanunjay R Jahagirdar, " Dynamically tuneable pre-modulation filter for an airborne PCM/FM telemetry system", 84(6):104053, IET Circuits, Devices and Systems Journal, March 2021.
  • Siva Ramakrishn Pillutla, Lakshmi Boppana, " Low-complexity bit-serial sequential polynomial basis finite field GF(2 m ) Montgomery multipliers", 84(6):104053, Microprocessors and Microsystems (Elsevier), February 2021.
  • R. Srinivasan, Tessy Thomas,  B. Lakshmi, "Power Spectral Density Computation and Dominant Frequencies Identification from the Vibration Sensor Output under Random Vibration Environment",  Defence Science Journal, Vol. 70, No. 6,, pp. 692-700, November 2020.
  • Siva Ramakrishna Pillutla, Lakshmi Boppana,” High-Throughput Area-Delay-Efficient Systolic Multiplier over GF(2m) for a Class of Trinomials”. Microprocessors and Microsystems. 2020 Jun 9:103173.
  • Siva Ramakrishna  Pillutla, Lakshmi Boppana, "Area-efficient low-latency polynomial basis finite field GF(2m) systolic multiplier for, a class of trinomials", Volume 97, Micro Electronics Journal (Elsevier), March 2020.
  • Siva Ramakrishna Pillutla, Lakshmi Boppana, "An area-efficient bit-serial sequential polynomial basis finite field GF(2m) multiplier", Volume 114, AEU -International Journal of Electronics and Communications (Elsevier), February 2020.
  • Sudha Ellison Mathe and Lakshmi Boppana, “Design and Implementation of a Novel Bit-Parallel Systolic Multiplier over GF(2m) for Irreducible pentanomials", Journal of Circuits, Systems and Computers, 2018.

  • Sudha Mathe,  Lakshmi Boppana, "A Novel Bit-Parallel Systolic Multiplier over GF(2m) for Irreducible Trinomials with ASIC and FPGA Implementations",  IET Circuits, Devices and Systems Journal, 2018

  • Ashok Agarwal, Lakshmi Boppana, "Low Latency Area-Efficient Distributed Arithmetic Based Multi-Rate Filter Architecture for SDR Receivers",  "Journal of Circuits, Systems and Computers,  2017
  • Sudha Ellison Mathe and Lakshmi Boppana, "Design and Implementation of a Sequential Polynomial Basis Multiplier over GF(2m)",  KSII TRANSACTIONS  ON INTERNET and INFORMATION SYSTEMS, 2017
  • Sudha Ellison Mathe and Lakshmi Boppana, "Low-Power and Low Hardware Bit-Parallel Polynomial Basis Systolic Multiplier over GF(2m) for Irreducible Polynomials" , ETRI Journal,  2017
  • Sudha Ellison Mathe and Lakshmi Boppana, “Efficient Bit-parallel Systolic Polynomial Basis Multiplier over GF(28) based on Irreducible Polynomials,” Indian Journal of Science and Technology, vol. 9, no. S1, December, 2016.
  • Ashok Agarwal,  Lakshmi Boppana, "SVD based reconfigurable SRC filter for multi-standard radio receivers", IET Circuits, Devices and Systems Journal, 2016
  • B. Lakshmi & A. S. Dhar, "Low latency pipelined CORDIC-like Rotator Architecture",  International Journal of Electronics, 2016
  • B. Lakshmi, A. S. Dhar, "VLSI Architecture for Parallel Radix-4 CORDIC",  Elsevier Microprocessors and Microsystems, Vol. 37, no. 1, pp. 79-86, Feb. 2013
  •  B. Lakshmi,  A.S.Dhar, "VLSI architecture for low latency radix-4 CORDIC", Elsevier Computers & Electrical Engineering, Vol. 37, no. 6, pp. 1032-1042, Nov., 2011

  • B. Lakshmi,  A.S.Dhar,  CORDIC Architectures: A Survey, VLSI Design, Volume 2010 (2010), Article ID 794891, 2010

 

PHDs Supervised

                        

    

S.NO

 

PhD

 

STUDENTS

Status

Area

1.       

Full-Time

Pradeep Goud

Pursuing

 VLSI Architectures for ECC  

2.       

Part-Time

B. Siva Shakthi

Pursuing

Low power VLSI architectures for Health applications

3.       

Part-Time

B.Sudharsan Reddy, Scientist D, Defence Organization

Pursuing

Optimal Telemetry System for Aerospace Vehicles

4.       

Part-Time

R. Srinivasan,  Scientist F,  Defence Organization

Pursuing

 VLSI Architectures for On-Board  Analysis of Flight Vibration Signals 

5

Full-Time

P. Siva Ramakrishna

Completed

VLSI Architectures for Light Weight Cryptography Algorithms 

6       

Full-Time 

Sudha Ellison Mathe

Completed

  Finite Field Multiplication     Architectures for Cryptographic   Applications

7

Full-Time

Ashok Agarwal

Completed

Software Defined Radio

Workshops/Conferences

 

 

                       

S.NO

                                               Title

                Duration

                                           Participants

1.

10-day workshop on "ASIC Design Flow: Low Power Perspective"

                 (under E&ICT Academy)

1st -10th July 2021

Faculty of various Engineering Colleges

2

 

6-day workshop on " Internet of Things (IoT) "

(Under Teaching Learning Centre (PMMMNMTT))

 

05 -10 June , 2017 

Faculty of  various Engineering colleges  in India

 3

 

6-day workshop on  " Internet of Things (IoT)"                 

 (under Teaching Learning Centre                                                       (PMMMNMTT))

  08-13 May,  2017

Faculty of  various Engineering colleges  in India

 

   4

      

 

6-day workshop on  " Internet of Things (IoT) "                                           (under TEQIP)

 

27 Feb- 04 March, 2017

 

Faculty of  various Engineering colleges  in India

  5


6-day workshop on " Internet of Things (IoT) "

          (under Continuing Education Program)

 

     04-09 June, 2016

 

Faculty of  various Engineering colleges  in India

    5


5-day Workshop  on " Low Power SoC Design using Xilinx FPGA Devices"

(under Continuing Educatwon Program)

 3 -7  October , 2015 Faculty of various Engineering Colleges in India
   6

A 5-day Worksop on "Embedded Systems Design Based on ARM and Microblaze platforms" 

( Under TEQIP)

 25-29 March, 2013

 Faculty of various Engineering Colleges in India

 

 

   1

 

Workshop on  " Internet of Things "

(TEQIP)

 

18-19 March ,2017

 

     

Students, NIT, Warangal

 

2

 

 

 

Workshop on  " Internet of Things "

(Intel)

Jan 24- 25, 2015

 Students NIT, Warangal

 

   3

 

Workshop on  " Embedded Project for Innovative Challenge"   

( Intel)

 

MArch 29-30, 2014

 

 Students from NITW & various other engineering colleges in India

 

   4

 Workshop on  " Internet of Thing"

    (Intel)

 

 

March 16, 2013

 

 

         Students, NITW

Projects

 

Research Projects

 

Principle Investigator    :   Design and FPGA Prototype Development of AFDX End System

Status                                       :   Completed

 Sponsored    by                   :   RCI, Hyderabad, 2013

 

Project                                     :   Design and Implementation of DSP and Multimedia  Instruction set for ANUPAMA Processor

Status                                        :   Completed               

Sponsored by                       :    ANURAG, DRDO , Hyderabad April 2012

      

Project                                      :   Intel Atom based embedded systems Laboratory Development

Status                                         :   July 2012 to till date

 

Project                                      :  FPGA  Implementation of a Digital down Converter for Software Defined Radio Applications

Status                                        :  Completed

RSM Sponsored by            :  NITW , 2011

Awards and Honors

 

S.No

 Name of Award

Awarding Agency

     Year

 

     1

     2

 

              Senior Member

                      Fellow

 

               IEEE

                  IEI

 

    2016

    2018

Additional Responsibility

        

               Faculty in-charge (Internet-LAN)                 :  June 2018 to   15th Feb 2021

               Associate Dean Student welfare                   :   August 2015 to July 2017

               Deputy Chief Warden for Ladies Hostels :   May 2014 to July 2015

               Head of the Department                                    :   Feb. 2011 to Feb. 2013