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Electronics & ICT Academy, Telangana State, India

VLSI Design Verification and Test (NKN Summer Course) @ NIT Warangal

Participants Information

Participants: 79
Female participants:31
Male participants:48
Participants from SC/ST category:10
Research Scholars:None

Topics Covered

  • SoC Design - an industrial perspective
  • Hardware Description Languages
  • Data Types, Concurrent Statements
  • Hardware Verification through Simulation
  • Circuit Level Verification
  • Sequential Statements
  • Behavioral modeling
  • Need for system level design and verification
  • Assertions and Checkers
  • Datapath and Controlpath design
  • Development of testbenches and concept of coverage
  • Concepts of formal verification
  • VLSI Testing and testable Design
  • Test Pattern Generation
  • Design for Testability and Built-in


List of Speakers

Dr. P. Srihari Rao, Associate Professor, NIT Warangal

Dr. P. Muralidhar, Associate Professor, NIT Warangal

Mr. Nagendra Bandi, Corell Technologies, Hyderabd

Feedback Summary

  • FDP was very informative, useful and research oriented.

  • Resource Persons were the major highlight of the programme.

  • Lab Assignments given during the FDP were very challenging.

  • Suggestions from Participants

  • More Lab sessions should be included.