Mixed VLSI System Design using CADENCE Tools @ Rajeev Gandhi Memorial College of Engineering & Technology, Nandyal

Participants Information

Participants:	46
Speakers:	06
Female participants:	11
Male participants:	35
Participants from SC/ST category:	13
Research Scholars	None

Lab Sessions

• Mixed signal IC Design Using Virtuoso
• Mixed signal IC Design Using Encounter
• Design using Mentor graphics

Topics Covered

• Fundamentals of Analog IC design
• Analog and Mixed signal Design Building blocks
• Research trends in low voltage Integrated circuits
• Design aspects of SERDES
• Power management IC design

List of Speakers

Dr. Ch. Gajendranath, Assistant Professor, IIT Hyderabad

Dr. P. Sreehari Rao, Associate Professor, NIT Warangal

Dr. Shubham Gupta, Design Engineer, Cadence Systems, Hyderabad

Mr. K. V. Krishna Reddy, Manager, Texas Instruments, Bangalore

Prof. Saurabh Saxena, Professor, IIT Madras

Dr. Nagendra Bandi, Engineer, CoreEL Technologies, Hyderabad

Feedback Summary

FDP was very useful for the participants to upgrade their knowledge.

Resource persons were the major highlight of the programme.

There was a good interaction between participants and resource persons.

Suggestions from Participants

More Lab Session should be conducted.